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CPLD解密:EPM7128AE 芯片解密

提供EPM7128AE解密服务,仅限学习、研究等合法用途,解密热线:010-62245566 13810019655
这里我们针对EPM7128AE 单片机以及CPLD系列其他单片机的研究及解密,欢迎有芯片解密的需求者与我们联系。
EPM7128AE 可解密的型号如下:
EPM7128AELC44-10
EPM7128AELC44-7
EPM7128AELC44-5
EPM7128AETC44-10
EPM7128AETC44-7
EPM7128AETC44-5
EPM7128AELC84-10
EPM7128AELC84-7
EPM7128AELC84-5
EPM7128AETC100-10
EPM7128AETC100-7
EPM7128AETC100-5
EPM7128AETI100-7
EPM7128AETC144-10
EPM7128AETC144-7
EPM7128AETC144-5
EPM7128AETI144-7
EPM7128AEUC169-10
EPM7128AEUC169-7
EPM7128AEUC169-5
EPM7128AEFC256-10
EPM7128AEFC256-7
EPM7128AE 特性如下,详细资料见EPM7128AE.pdf
■ High-performance 3.3-V EEPROM-based programmable logic
devices (PLDs) built on second-generation Multiple Array MatriX architecture
■ 3.3-V in-system programmability (ISP) through the built-in
IEEE Std. 1149.1 Joint Test Action Group (JTAG) interface with advanced pin-locking capability
– MAX 7000AE device in-system programmability (ISP) circuitry compliant with IEEE Std. 1532
– EPM7128A and EPM7256A device ISP circuitry compatible with IEEE Std. 1532
■ Built-in boundary-scan test (BST) circuitry compliant with IEEE Std. 1149.1
■ Supports JEDEC Jam Standard Test and Programming Language (STAPL) JESD-71
■ Enhanced ISP features
– Enhanced ISP algorithm for faster programming (excluding EPM7128A and EPM7256A devices)
– ISP_Done bit to ensure complete programming (excluding EPM7128A and EPM7256A devices)
– Pull-up resistor on I/O pins during in-system programming
■ Pin-compatible with the popular 5.0-V MAX 7000S devices
■ High-density PLDs ranging from 600 to 10,000 usable gates
■ Extended temperature range

【上篇】Altera EPM7128B
【下篇】Altera EPM7096
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